9.0 Contineous Assignment
Explicit Continuous Assignment
Implicit Continuous Assignment
- Explicit continuous assignments require two statements: one to declare the net, and one to continuously assign a value to it.
- Implicit continuous assignments combine the net declaration and continuous assignment into one statement.
- net_type may be any of the net data types except trireg.
- strength (optional) may only be specified when the continuous assignment is combined with a net declaration. The default strength is (strong1, strong0).
- expression may include any data type, any operator, and calls to functions.
- Continuous assignments model combinational logic. Each time a signal changes on the right-hand side, the right-hand side is re-evaluated, and the result is assigned to the net on the left-hand side.
- Continuous assignments are declared outside of procedural blocks. They automatically become active at time zero, and are evaluated concurrently with procedural blocks, module instances, and primitive instances.
Continuous Assignment Examples
//A 32-bit wide 2:1 MUX wire [31:0] mux_out; assign mux_out = sel? a : b;
//A 16-bit wide tri-state buffer with delay tri [0:15] #2.8 buf_out = en? in: 16'bz;
//A 64-bit ALU with ECL output strengths wire [63:0] (strong1,pull0) alu_out = alu_function(opcode,a,b);